hlslibs.org

What It Is

HLSLibs is a collection of free, open-source libraries for High-Level Synthesis, implemented in standard C++ for bit-accurate hardware and software design. Its goal is to build a community for sharing HLS knowledge and IP, helping research and engineering teams synthesize algorithms into FPGA or ASIC hardware acceleration implementations more quickly. The project is published on GitHub under the Apache 2.0 license.

Core Capabilities

Its core offering is not a single tool, but a set of foundational HLS libraries. AC Datatypes provides bit-accurate integer, fixed-point, floating-point, complex number, and channel modeling, with an emphasis on clear and consistent simulation and synthesis semantics. It also claims faster simulation and compilation than SystemC datatypes in several scenarios. AC Math provides synthesizable C++ math functions, covering reciprocals, logarithms, exponentials, square roots, trigonometric functions, matrix classes, and linear algebra functions, along with unit tests. AC DSP includes common DSP modules such as filters and FFTs. AC ML provides machine learning IP and reference designs. MatchLib Connections implements latency-insensitive channels in SystemC for HLS modeling, simulation, and verification.

Pricing and Ecosystem

The main materials clearly state that the project is free, open, and licensed under Apache 2.0. No information was found about a commercial edition, paid support, or hosted services. In terms of ecosystem, it is closely connected with Catapult High-Level Synthesis, SystemC, MatchLib, and GitHub. MatchLib Toolkit also provides examples, makefiles, and Catapult synthesis scripts.

Pros and Cons

The advantages are its permissive open-source license, coverage of common foundational HLS modules, multiple documentation entry points, and strong focus on bit-accurate behavior and predictable synthesis. The downsides are that it is highly specialized: users need to understand C++ templates, fixed-point conversion, and SystemC/HLS workflows. The available materials provide limited information on compatibility with non-Catapult toolchains, community activity, and commercial support.

Who It’s For and Access from China

It is suitable for teams working on FPGA/ASIC acceleration, DSP, linear algebra, machine learning hardware IP, and academic research—especially engineers who need to move from C++ specifications to synthesizable hardware. Access from China cannot be determined from the available materials. Since the source code depends on GitHub, actual usability may be affected by the local network environment. Alternatives include SystemC datatypes, libraries bundled with vendor HLS tools, and other FPGA math/DSP IP libraries.