designers-guide.com

What It Is

Designer’s Guide Consulting is a specialist organization focused on analog/mixed-signal verification. Its website content mainly centers on analog verification, AMS/DMS verification, UVM, SystemVerilog, Verilog-AMS, and its Models in Minutes (MiM) tool. From an education/course perspective, it is not a general online learning platform; instead, it provides engineering-oriented learning resources through webinars, Q&A panels, YouTube videos, and an analog verification class.

Core Dimensions

The course coverage is highly vertical, focusing on topics such as analog and mixed-signal chip verification, model generation, self-checking testbenches, specification-driven verification, and integrating analog models into UVM environments. In terms of teaching format, the site explicitly mentions webinars, Q&A panels, and a YouTube playlist, as well as an analog verification class, but it does not state whether the class is live, recorded, or one-on-one. Certification or certificates are not disclosed. Based on the website and event titles, the teaching language appears to be English. The instructors and institutional background appear strong: the organization has participated in DVCon 2024/2025 papers, emphasizes deep experience in verification, simulation, and modeling best practices, and also partners with Ulkasemi to provide verification services.

Pricing and Support

Pricing transparency is limited. The content only mentions that a discount was offered in April 2024 for students taking the analog verification class, with details requiring direct contact; no standard pricing, enterprise pricing, or refund policy is publicly listed. Support is more oriented toward enterprise consulting and project services, including helping teams choose among continuous-electrical, discrete-electrical, and discrete-real model types, assess resource needs, and provide experienced verification engineers.

Pros and Cons

The main advantage is that the content is highly specialized and directly addresses real pain points in semiconductor projects. MiM can generate models and self-checking testbenches from specifications, turning a large amount of repetitive modeling work into specification writing. The webinars and paper materials also offer strong reference value. The downsides are incomplete course information: there is no clear syllabus, duration, certificate information, pricing, or individual instructor profiles. The barrier to entry is relatively high, making it better suited to learners who already have a background in circuits, EDA, or verification.

Who It’s For and Access from China

It is suitable for analog/mixed-signal verification engineers, chip design teams, semiconductor companies that need to establish AMS verification workflows, and students with a foundation in microelectronics. Access from China, payment methods, and Chinese-language support are not stated in the content, so they should be considered unknown. Learners in China may also refer to Cadence, Siemens EDA, and Synopsys training, DVCon materials, and courses related to UVM, SystemVerilog, and Verilog-AMS as alternatives or supplements.